TSMC's next-gen 2nm silicon is reportedly on track for later this year but don't expect chips for PCs until 2027 and beyond
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PC Gamer14d
TSMC's next-gen 2nm silicon is reportedly on track for later this year but don't expect chips for PCs until 2027 and beyond
The ongoing viability of Moore's law is up for debate. But it seems Taiwanese megfab TSMC is determined to crank out new silicon regardless. The latest reports claim TSMC's next-gen 2nm chip node ...
Design-Reuse9d
EnSilica develops sureCore's new, Ultra-Low Power IoT reference platform
The sureCore IoT reference platform has been taped out using TSMC’s commercially available ... high density SRAM bit cells, sureCore’s SRAM IP is capable of operation at near-threshold bit cell ...
Design-Reuse9d
Advanced Power Management in Embedded Memory Subsystems
As the silicon process migrates at the most advanced technology nodes, the SRAM bitcell area ... with advanced technologies, the bit cell is more sensitive to a lower voltage (VDD). As shown in Figure ...
IEEE7d
5nm High-Efficiency and High-Density Digital SRAM In-Memory-Computing Macros for AI Accelerators
Abstract: Two specialized digital SRAM in-memory computing (IMC) macros were implemented using a 5nm process: (1) a high-efficiency (HE) macro, and (2) a high-density (HD) macro. The HE macro achieves ...
Semiconductor Engineering8d
Impact of Extremely Low Temperatures On The 5nm SRAM Array Size and Performance
A new technical paper titled “Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures” was published by ...
ExtremeTech8d
Taiwan and TSMC Weather a 6.4 Magnitude Earthquake
Fab 18 originally built chips using TSMC’s 5nm process and now also uses the 3nm process for more advanced chips. TSMC also produces 2nm chips at Fab 20 in Baoshan, according to TrendForce.