Taiwan Semiconductor Q4 revenue hit $26.88B, up 38.8% YoY, driven by demand for AI chips and advanced node technologies. TSM guided Q1 revenue to $25B-$25.8B, supported by AI growth but tempered ...

Taiwan Semiconductor reported fourth-quarter revenue of $26.88 billion (NT$868.46 billion), up 38.8% year-over-year, topping the analyst consensus estimate of $26.28 billion. Also Read: OPEC’s ...

The latest possible workaround is called self-aligned quadruple patterning (“SAQP”), a technology that allows silicon wafers to be etched multiple times, increasing transistor density and chip ...

The most recent steps toward footprint reduction pit EUV patterning against traditional ArF SADP and SAQP processes for cutting-edge 2D DRAM, according to Daniel Soden, business development ...

The most advanced sub-5nm silicon nodes require the latest EUV (extreme ultraviolet) lithography tools like the one above, but Chinese chipmakers are stuck with DUV (deep ultraviolet) lithography.

Under this agreement, Ambarella will utilize Qualitas C/D-PHY IP, implemented on the 5nm process, to apply it to its next-generation AI engine, CVflow®-based SoCs (System-on-Chips). 2 New!!! BrainChip ...

WHU team boosts efficiency of AlGaN-based DUV emitter by manipulating precursors of group-III nitrides for p-Al 0.8 Ga 0.2 N electron blocking layer Researchers from Wuhan University in China have ...

Abstract: It is well known that inclined sidewall scattering structures can improve the light extraction efficiency (LEE) of micro deep ultraviolet (DUV) light-emitting diodes (LEDs). However, ...

UVC microLED shows viability of cheaper maskless photolithography, enabling quicker exposure of photoresist films A team from Hong Kong University of Science and Technology (HKUST) has developed a ...

Abstract: Two specialized digital SRAM in-memory computing (IMC) macros were implemented using a 5nm process: (1) a high-efficiency (HE) macro, and (2) a high-density (HD) macro. The HE macro achieves ...